1. Field of the Invention
The present invention relates to a switching power-supply unit in which radiant noises from high frequency waves are reduced.
2. Description of the Related Art
A conventional forward switching power-supply unit will be described with reference to FIG. 5. 1 denotes an input power supply in which, for example, a rectifying circuit for rectifying a commercial power-supply voltage has a large capacitance capacitor, such as electrolytic capacitors, connected in parallel. The terminals of the input power supply 1 are connected in series to an input circuit comprising a primary winding 2a for a switching transformer 2, a switching device such as a field effect transistor (hereinafter referred to as an "FET") 3, and a resistor R1 comprising a current-detecting circuit 4. The input-power supply circuit 1 and an interconnection pattern for connecting them form a current-loop circuit a in which a current having a switching frequency flows, as indicated by a broken line, are disposed on a mounting circuit base.
The current-detecting circuit 4 may contain, instead of the resistor R1, a current transformer Tc shown in FIG. 6. FIG. 6 shows part of the switching power-supply unit.
A secondary winding 2b for the switching transformer 2 is connected to a rectifying and smoothing circuit 5. The rectifying and smoothing circuit 5 comprises a rectifying circuit and a smoothing circuit. The rectifying circuit comprises a rectifying diode D1 and a commutating diode D2. The anodes of the rectifying diode D1 and the commutating diode D2 are connected together. The anode of the rectifying diode Dl is connected to the start of the secondary winding 2b, and the anode of the commutating diode D2 is connected to the end of the secondary winding 2b.
The smoothing circuit comprises a choke input inductor L1 and a capacitor C1. One electrode of the inductor L1 is connected to the cathodes of the rectifying diode D1 and the commutating diode D2. The output of the rectifying and smoothing circuit 5 is supplied to a load 7 via the output terminals 6a and 6b of the switching power-supply unit.
An error-detecting circuit 8 is connected across the output terminals 6a and 6b. The error-detecting circuit 8 contains a parallel circuit of a series circuit comprising a photodiode Pd and a shunt regulator Sr, and a series circuit comprising voltage dividing resistors R2 and R3. The reference terminal of the shunt regulator Sr is connected to the point at which the voltage resistors R2 and R3 are connected.
The collector of a phototransistor Pt which is photocoupled to the photodiode Pd is connected to the feedback terminal Fb of a control circuit 9, and the emitter is connected to ground.
The output terminal 9a of the control circuit 9 is connected to the gate of the FET 3, and the current-detecting terminal 9b is connected to the source of the FET 3. The control circuit 9 includes a pulse width modulation (PWM) circuit or pulse frequency modulation (PFM) circuit, and provides for the switching of the FET 3 with a driving signal having a pulse width or pulse-repetition frequency changed in accordance with an error signal fed back from the error-detecting circuit 8. The control circuit 9 includes a breaking circuit for switching off the FET 3.
Next, the operation of the switching power-supply unit shown in FIG. 5 will be described.
While the switching power-supply unit is stable, the FET 3 is switched on and off by driving signal pulses as shown in FIG. 7(c). Accordingly, in the primary winding 2a of the transformer 2, a trapezoid-pulse current i.sub.2a as shown in FIG. 7(a) flows, and in the secondary winding 2b, a trapezoid-pulse current i.sub.2b as shown in FIG. 7(b) flows.
In other words, switching on the FET 3 at time t1 applies a voltage V.sub.in from the input power supply 1 across the ends of the primary winding 2a. Accordingly, the current starts to flow rapidly in the primary winding 2a, and a voltage V.sub.2b is induced across the ends of the secondary winding 2b, which is electromagnetically coupled to the primary winding 2a. The induced voltage V.sub.2b is proportional to the turns ratio (N2b/N2a) of the number of turns N2b of the secondary winding and the number of turns N2a of the primary winding 2a.
In the forward switching power-supply unit, the induced voltage V.sub.2b forward biases the rectifying diode D1. This allows a current to flow in the loop of the secondary winding 2b, the rectifying diode D1, the inductor L1 and the capacitor C1, which charges the capacitor C1. The voltage V.sub.C1 across the electrodes of the capacitor C1 is supplied to the load 7. The voltage VL1 across the electrodes of the inductor L1 is (V.sub.2b-V.sub.C1). Accordingly, when the inductance of the inductor L1 is L, and the conductive period of the FET 3 is t.sub.on (t1-t2), the current i.sub.2b flowing in the secondary winding 2b can be given by the following expression: EQU d(i.sub.2b)={(V.sub.2b -V.sub.C1)/L}.multidot.dt
where 0.ltoreq.t.ltoreq.t.sub.on. During the conductive period t.sub.on, the current i.sub.b2 gradually increases over time.
Switching off the FET 3 at time t2 rapidly increases the current i.sub.2a flowing in the primary 2a. Accordingly, the transmission of power from the primary winding 2a to the secondary winding 2b is lost, so that both currents i.sub.2a and i.sub.2b cannot flow in a non-conductive period t.sub.off (t2-t3) during which the FET 3 is switched off. During the non-conductive period t.sub.off, reverse electromotive force is generated in the inductor L1. As a result, the current flows in the loop of the inductor L1, the capacitor C1 and the commutating diode D2, and the capacitor C1 discharges.
As a result, during the conductive period t.sub.on of the FET 3, the trapezoid-pulse currents i.sub.2a and i.sub.2b flow in the primary winding 2a and the secondary winding 2b.
Next, the case where the voltages of the output terminals 6a and 6b change will be described.
If it is assumed that the input power supply 1 or the load 7 causes the voltage of the output terminal 6a to increase, the voltage of the connection point of the voltage dividing resistors R2 and R3 also increases, and the reference voltage of the shunt regulator Sr also increases, which reduces the internal resistance between the anode and the cathode and which increases the current flowing in the photodiode Pd. This current increase reduces the internal resistance between the collector and emitter of the phototransistor Pt and the potential of the feedback terminal Fb of the control circuit 9.
Accordingly, the control circuit 9 controls the FET 3 by reducing the conductive period percentage or frequency of a control signal. This reduces the power transmitted from the primary winding 2a to the secondary winding 2b, which reduces the output voltage of the rectifying and smoothing circuit 5, namely, the output voltage across the output terminals 6a and 6b, so that the original working condition is restored.
In addition, when the voltage of the output terminal 6a decreases, the error-detecting circuit 8, the control circuit 9 and the current-detecting circuit 4 operate in reverse with respect to the above-described case, and the voltage across the output terminals 6a and 6b increases to restore the original working condition.
When an abnormal condition occurs, such as the short-circuiting of the load 7, in order to prevent damage due to an excess current in the FET 3, the current-detecting circuit 4 detects the current flowing in the FET 3 (via the voltage across the ends of resistor R1 or a voltage induced in the secondary winding of current transformer Tc shown in FIG. 6).
The detected voltage is used such that it is compared with a reference voltage in the control circuit 9, and when it exceeds the reference voltage, the FET 3 is switched off.
Recently, there has been employed a current mode control has been used in which the signal detected by the current-detecting circuit 4 is actively used as a control signal for the FET 3 because the current flowing in the FET 3 is proportional to the voltage of the input power supply 1.
According to conventional switching power-supply units, in general, the FET 3 is switched on and off at a frequency of 100 to 500 kHz. While the FET 3 is in the conductive condition t.sub.on, a rapidly rising and dropping trapezoid-pulse current flows in the current-loop circuit a, indicated by a broken line in both FIG. 5 and FIG. 6, in which a current having a switching frequency flows. A voltage having a frequency higher than the switching period is generated, caused by a leakage inductance from the primary winding 2a of the transformer 2 and the parasitic capacitances of the terminals of the switching device 3, and further by the parasitic capacitance and parasitic inductance of the circuit interconnections. A noise current having a high frequency not less than several MHz is superimposed on the trapezoid pulse currents i.sub.2a and i.sub.2b flowing in the primary winding 2a and the secondary winding 2b, as shown in FIGS. 7(a) and 7(b).
When the trapezoid pulse current i.sub.2a on which the high frequency noise current is superimposed flows in the current-loop circuit a, radiant noise, such as line spectrum envelope Sa, is generated in a high frequency band, as shown in FIG. 2. The radiant noise tends to increase in proportion to the area of the current-loop circuit a on the mounting circuit base. This is because the circuit interconnection in which the switching frequency current having a high frequency lengthens as the area of the current-loop circuit a enlarges and the current-loop circuit a lengthens.
Accordingly, reducing the radiant noise requires an extreme reduction of the area of the current-loop circuit a on the mounting circuit base. Therefore, it is required to reduce the sizes of circuit components included in the current-loop circuit a and areas on which the components are mounted. Concerning the components included in the current-loop circuit a, the size reduction of the switching transformer 2 and the size reduction of the FET 3 are in progress by making the switching current have a high frequency and employing finer device processing, respectively.
Conversely, when the current-detecting circuit 4 is formed using the resistor R1, the size of the resistor R1 is determined by the loss, which makes it difficult to reduce its size. In addition, as shown in FIG. 6, when the current-detecting circuit 4 is formed using the current transformer Tc, the number of turns of its secondary winding cannot be reduced so as to prevent the saturation of the current transformer Tc, which also makes it difficult to reduce its size. As described, among the circuit components included in the current-loop circuit a, size reduction of the current-detecting circuit 4 is difficult, which limits the reduction of the current-loop circuit a.